Abstracts for Publications by Rick L. Spickelmier


Rick Spickelmier and Brian Richards, "The OCT Data Manager," Anatomy of a Silicon Compiler, Robert W. Brodersen, Editor. Kluwer Academic Publishers, Boston, 1992.

From the introduction of Chapter 2:

OCT is a data manager based on object-oriented principles for electronic CAD applications. OCT offers a simple interface for storing information about the various aspects of an evolving system design which can range from the lowest level of physical description of a chip to board level specification. The data manager provides a mechanism to store and retrieve information through a set of C language procedural calls that buffer the user from the actual data storage strategy.


Timothy Barnes, David Harrison, A. Richard Newton, and Rick L. Spickelmier, "Electronic CAD Frameworks," Kluwer Academic Publishers, Boston, 1992.

From the back cover of the book:

The term CAD Framework has come to mean all of the underlying facilities provided to the CAD tool developer, the CAD system integrator and the end user (IC or system designer) which are necessary to facilitate their tasks. Broadly speaking, these three groups of people represent the users of the CAD Framework, each with their own needs and particular emphasis. ELECTRONIC CAD FRAMEWORKS presents a general discussion of the major components of a CAD Framework and their relationships to one another. Each area is then presented in more detail. A brief review of the state-of-the-art and current directions for research are presented. Since the approach taken to the development and enhancement of CAD Frameworks has had more impact on their success or failure than any particular design decision, some observations on this topic are included in Chapter 9: Implementing a CAD Framework. Finally, the influence of related disciplines and the ongoing software standards efforts on the area of CAD environments is reviewed.


Rick L. Spickelmier, Editor. Oct Tools Distribution 3.5. Industrial Liaison Office, Electronics Research Laboratory, University of California, Berkeley, California, March 1990. (Also, editor for Oct Tools Distributions from 2.1 to 4.0)

A Guide to the use of the Oct Tools Suite of IC CAD tools. Tutorials, user guides, and manual pages.


David S. Harrison, A. Richard Newton, Rick L. Spickelmier, and Timothy Barnes, "Electronic CAD Frameworks," Proceedings of the IEEE, pp. 393-417, February 1990.

From the abstract:

The term CAD framework has come to mean all of the underlying facilities provided to the CAD tool developer, the CAD system integrator and the end user (IC or system designer) which are necessary to facilitate their tasks. The major goal of a CAD framework is that it reduce the time and cost needed to develop or modify a CAD system such that it meets the needs of its users. Unfortunately, this seemingly simple test represents a very broad and difficult set of requirements, many of which involve interacting tradeoffs, and most of which are evolving rapidly with time.

The development of the CAD framework concept in the domain of electronic circuit design is reviewed. Brief description of the most important work in the area are provided. The major components of a CAD framework are identified and the requirements and desirable features of these components are described in some detail. Many of the key engineering tradeoffs required to build CAD frameworks are also examined, using examples from existing CAD systems. Standardization is an important part of the drive to better frameworks, the emerging framework standards efforts are also reviewed.


Rick L. Spickelmier, "The Application of Knowledge-Based Systems to Design Verification," UCB/ERL M89/126, Electronics Research Laboratory, University of California, Berkeley, California, November 1989. Ph.D Thesis.

From the abstract:

As a circuit design proceeds, it is continually checked by the designer for errors, by visual inspection, by simulation, or by using other verification tools (such as electrical rule checkers). Before most designs can proceed to fabrication, they must go through a formal design review where other designers analyze the design and look for errors. Errors found during the verification process range from easily recognizable problems, such as a power supply short, to a CMOS static gate having N and P cores that are not logical duals, to hard-to-recognize problems, such as those dealing with charge sharing and race-conditions.

A circuit critic is a tool that finds errors in a circuit design and may recommend corrections. There are three main uses of a circuit critic: finding errors not easily found by other verification tools (e.g. timing, charge sharing), finding errors for novices, and checking design style compliance. Novices learn the circuit configurations that lead to these errors by experience. A circuit critic can have the patterns that describe these errors in it and the novice can use the critic to check the circuit. Many design styles have a set of rules, that if following will produce a "correct" design. A circuit critic can check for compliance with these rules.

The work presented in this dissertation focuses on exploring the ideas of technology independence of critics, tight integration with a CAD system, and the representation of knowledge for the critic. To explore these ideas a test-bed, called Critic, was developed. Critic reads a description of the technology and design style to be used in the check and is tightly integrated into the Berkeley Design Environment, both in terms of the data input to the system and the control of Critic. An example of the use of Critic and the results of using Critic are presented.

Critic Screen Shot


Rick L. Spickelmier and A. Richard Newton, "Critic: A Knowledge-Based Program for Critiquing Circuit Designs," The Proceedings of IEEE ICCD, Rye Brook, NY, pp. 324-327, October 1988. Best Paper Award - CAD Track.

From the abstract:

Critic is a knowledge-based system that looks for errors or "bad design-style" in circuit designs. Critic take as input a description of a circuit and a knowledge-base that describes a particular design-style and technology. A knowledge-base consists of: process and design-style constants, a set of primitive descriptions, a set of structure description, and error checking rules. Critic use the information in the knowledge-base to find structures and errors in the circuit. The errors can range from easily-recognizable errors such as a transistor bulk being connected to the wrong supply or a static gate having non-equal rise and fall times, to hard-to-recognize errors such as those dealing with charge sharing, timing, and testability.

Critic is tightly integrated into the Berkeley Design Environment. Critic runs as a remote application from the graphics editor, VEM, and access the critic and the knowledge-base using the design-data manager, OCT. The knowledge-base is described entirely in OCT and thus can be created, examined, and modified using any other the OCT browsers and editors.


David S. Harrison, Peter Moore, Rick L. Spickelmier and A. Richard Newton, "Data Management and Graphics Editing in the Berkeley Design Environment," The Proceedings of IEEE ICCAD, Santa Clara, CA, pp. 20-24, November 1986.

From the abstract:

The OCT data manager and the VEM graphics editor form the foundation for the integration of many of the CAD tools being developed at Berkeley. OCT provides the means for building, modifying and search circuit designs, and a uniform means of storage and retrieval of these designs. VEM acts as a graphics shell for views and editing OCT design and invoking other CAD tools that manipulate, analyze, or optimize these designs. The current set of tools using OCT include compactors, module and array generators, logic synthesis tools, circuit simulators, a circuit critic, and placement and routing tools. VEM is designed to interface to all these tools, using the OCT data manager and using remote procedure calls.


Rick L. Spickelmier and A. Richard Newton, "Connectivity Verification Using a Rule-Based Approach," The Proceedings of IEEE ICCAD, Santa Clara, CA, pp. 190-192, November 1985.

From the abstract:

Connectivity verification is the process of comparing two circuit descriptions to make sure that they are topologically identical. This comparison is a one-to-one correspondence between elements and nodes in the two circuits, not some functional equivalence. The most common example of this is comparing a designer's simulation file (or schematic) with an extracted layout that is supposed to implement the designer's circuit. Almost all connectivity verifiers can handle the straightforward problem very efficiently. However, most of the time in these programs is spent handling the special cases, such as terminal permutability and parallel paths. A connectivity verification technique using a rule-based system has been developed that handles the above special cases with little performance penalty. The new rule-based system uses a global approach to the comparison, rather than the local techniques used in most conventional connectivity verifiers. An added advantage of this rule-based implementation is the ease with which new rules can be added by the user.


C. Lob, R. Spickelmier and A. R. Newton, "Circuit Verification Using Rule-Based Expert Systems," The Proceedings of ISCAS, Kyoto, Japan, pp. 881-884, June 1985.

From the abstract:

For many CAD problems, either an efficient algorithm is not known or handling "special cases" makes the algorithm ineffective. In these situations, rule-based expert system technology offers a possible solution. Two tools, a circuit critic and a connectivity verifier, have been implemented using rule-based expert system technology. In both cases, the tools have demonstrated the utility of this technology for certain tasks. The circuit critic is a new tool which will play an important role in future IC verification systems.


Rick L. Spickelmier and A. Richard Newton, "A General Knowledge-Based Circuit Critic," ACM SIGART Newsletter, pp. 78-79, April 1985.

See my Ph.D Thesis or my ICCD conference paper.


Rick L. Spickelmier and A. Richard Newton, "A Rule-Based Connectivity Verifier," ACM SIGART Newsletter, pp. 79-80, April 1985.

See my ISCAS conference paper.


Rick L. Spickelmier and A. Richard Newton, "WOMBAT: A New Netlist Comparison Program," The Proceedings of IEEE ICCAD, Santa Clara, CA., pp. 170-171, November 1983.

See my Masters Project Report.


Rick L. Spickelmier, "Verification of Circuit Interconnectivity," UCB/ERL M83/66, Electronics Research Laboratory, University of California, Berkeley, California, October 1983. Masters Report.

From the introduction:

As integrated circuits increase in size and complexity, conventional verification techniques, such as hand checking these circuits for errors, can take hours and sometimes days with no final guarantee of an error-free circuit. Circuits that have been visually checked by designers and layout specialists have been found to have missing contacts when entering the mask shop. Error like this one are costly in terms of money and design time. Computer programs to verify the correctness of these circuits can reduce the checking time to minutes or even seconds and guarantee that the circuit is free of connectivity errors. Such programs compare the schematic netlist with a netlist extracted from the layout itself and indicate any discrepancies.


Copyright 1995-2008, Rick L. Spickelmier
All Rights Reserved.

Last Updated: 04 May 2006.